Author: Robert Hyatt
Date: 06:30:35 09/04/00
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On September 04, 2000 at 03:45:39, Uri Blass wrote: >On September 03, 2000 at 23:02:51, Robert Hyatt wrote: > >>On September 03, 2000 at 20:13:57, Aaron Gordon wrote: >> >>>What about with channel bonding in linux? For example you could get 6 100mbit >>>nic's per pc to have 0.6Gbit (or if you've got some serious cash then 6 1gbit >>>NICs). As soon as I get some money I'm going to try to experiment with the small >>>linux cluster I've got here, maybe go with three 100mbit nics per pc. >>>Anyway, it's a thought.. should help the bandwidth problem a lil'.. >> >> >>No, sorry. Totally wrong idea. The PCI bus _is_ the problem. It can >>sustain about 100mbytes/second. If you put 6 NICS in the machine, you >>are talking about roughly 10mbytes/sec per nic and you really can't drive >>the things at 100mbits/sec... I have been able to get roughly 70 mbits/sec >>as an upper bound. You could go to something faster (giganet) but then you >>run into the PCI bus limit, and trying to bond more than one of those will >>result in bus saturation... at the 100mbytes/second limit... >> >>We are talking about the max bandwidth between the CPU and memory, which is >>the bottleneck in the PC, and that is also where the C90 totally cooks the >>PC. IE the C90 has 16 cpus at a 2ns clock cycle (500mhz roughly). In one >>clock cycle, the machine can do 4 64 bit memory reads, and two 64 bit memory >>write. If you multiply that out, that is 48 bytes per cycle, times 16 cpus, >>which is 500,000,000 * 48 * 16. Compare that memory bandwidth to the PC >>bandwidth and you see why the C90 came out at 30 million dollars when they >>were first delivered. That is roughly 4 x 10^11 bytes per second... >> >>400,000,000,000 bytes per second. Think about that number for a second. 400 >>gigabytes per second... compared to 100 megabytes per second... > >It suggests that the cray is 4000 times faster than the PCs but Cray blitz was >not 4000 times faster than the PC's and the biggest number that I remember was >7,000,000 nodes per second. > >Uri It suggests that memory can be moved around 4000 times faster. However, with 64 scalar registers, 8 vector registers that hold 128 words each, 64 temp registers to back up the scalar registers, 8 address registers to calculare addresses or other 32 bit values, 8 temp registers to back up those address registers, you are able to keep lots of things in registers so that _every_ instruction doesn't have to access memory... 4000 would be a _maximum_ difference.
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