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Subject: Re: when a & is faster than a && ?

Author: Tom Kerrigan

Date: 18:11:17 09/22/01

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On September 22, 2001 at 09:58:55, Robert Hyatt wrote:

>On September 22, 2001 at 04:10:46, Tom Kerrigan wrote:
>
>>On September 21, 2001 at 23:03:36, Robert Hyatt wrote:
>>
>>>On September 21, 2001 at 20:42:34, Eugene Nalimov wrote:
>>>
>>>>GCC uses CMOVs. MSVC does not. So you can see yourself that CMOVs only hurts :-)
>>>>
>>>>Eugene
>>>
>>>:)  I assume you mean "hurts portability among processors" and not "hurts
>>>speed?"  :)
>>
>>Probably both, if you consider the P5 a processor that you might want to "port"
>>to, and the P6's brain-dead implementation of CMOV.
>>
>>-Tom
>
>
>I'm not sure what you mean by "brain dead".  It does eliminate the branch
>misprediction problem nicely.  The idea came from the alpha.

Yes, that's the idea for the instruction, not the implementation. (Notice that I
did say implementation.) I can't remember the exact details at the moment, but
CMOVs on the P6 take several cycles more than they "should" and it's usually
faster to avoid them altogether.

-Tom



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