Author: Tom Kerrigan
Date: 10:26:26 10/25/01
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On October 24, 2001 at 23:13:13, Robert Hyatt wrote: >On October 24, 2001 at 17:16:06, Tom Kerrigan wrote: > >>On October 24, 2001 at 15:23:35, Robert Hyatt wrote: >> >>>"numbers" simply don't require such large representations, which wastes a lot >>>of bus bandwidth transferring 128 bit values when the majority are 16 bits or >>>less... >> >>The only bus bandwidth that's really wasted is in the datapath, which doesn't >>really matter. Just because the datapath is 128 bits doesn't mean all memory >>transactions have to be. >> >>-Tom > > >Sure it does. In fact, the memory datapath is _always_ a multiple of the >wordsize, otherwise super-scalar won't work at all. > >IE Intel uses 64 bit data paths. Alphas use 256. Cray does it totally >different but they gate pairs of words (128 bits) to/from memory... Depends on what you mean by datapath. I'm using the comp org term, i.e., the register file, ALU, and busses in between. Using this term, Intel is 32-bit and Alpha is 64-bit. I don't understand your superscalar comment--not every instruction is a load/store. Why wouldn't you be able to issue two 32-bit ADD instructions on a 8192-bit CPU just as easily as on a 32-bit CPU? And if your load/store instructions only loaded and stored a fraction of a register at a time, then the width of your memory interface doesn't matter that much, either. Of course, a lot of ALU bits would be wasted, but oh well. -Tom
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