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Subject: Re: Alpha chip

Author: Robert Hyatt

Date: 11:40:13 06/04/98

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On June 04, 1998 at 14:30:31, Tom Kerrigan wrote:

>On June 03, 1998 at 19:52:54, Robert Hyatt wrote:
>
>>>Not true... It's been used successfully in a number of supercomputers.
>>>The idea has been around and worked for 20+ years now. In fact, back
>>>when RISC was coming to light, there was a fairly large-scale RISC vs.
>>>VLIW controversy.
>>none that I know of.  IE not in Cray, CDC, Hitachi, Fujitsu, texas
>>instruments, etc...  ergo I know of *no* successful VLIW computers by
>>anyone.  just prototypes here and there...
>
>Well, the success of a supercomputer is hard to measure. With the Intel
>supercomputer, it only sold one, but it could be said that it was fairly
>successful. I was working at HP back when these questions were being
>asked, and because of that, I know that there were two (maybe more)
>supercomputers based on VLIW made in the 80's alone. You're right, none
>of the big names built them, but they were built all the same, and from
>what I gather, they were reasonably successful.
>

maybe we need to define successful.  I go with two measures, overall
performance, and overall sales.  Cray is/was/will be clearly number
one.  They make and have generally always have made the fastest computer
in the world, non-VLIW.  And on sales they walk away frm everyone with
over 250 installations several years ago.  Not to mention current
delivery times booked up to 2 years into the future.


>>>>magnifying glass, it is simply a restricted form of superscalar, as was
>>>Yes, it's quite clearly superscalar, and sort of "restricted," but at
>>>the same time, it simplifies chip design extrordinarily, leaving die
>>>space for more execution units, more cache, whatever.
>>no argument there... but it puts the difficult work off onto the
>>compiler,
>>since it has to be done somewhere.  And doing this affects binary
>>compatibility in horrible ways...  much nicer to have a family of
>
>These are simply problems to solve, but not reason to scrap the entire
>idea...
>
>Cheers,
>Tom


yes.. but the problems have been solved.  That was what super-scalar was
all about originally.  where you could have the equivalent of a "SIW",
"MIW", "LIW" and "VLIW" type architectures, simply by designing your
processor to fetch one, two, three or N words at a time.  That's the
wonderful part of super-scalar architectures.. they take old binary
apps and run them faster.  And when you "pool" instructions you don't
even need the compiler's assistance in pairing up instructions for
simultaneous issue.



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