Author: Vincent Diepeveen
Date: 03:01:02 06/13/98
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On June 12, 1998 at 06:37:38, Dezhi Zhao wrote: > >On June 12, 1998 at 03:41:43, Vincent Diepeveen wrote: > >>Now what's more likely: BSF/R to become faster in future or mispredicted >>branches becoming faster :) > >Yes. It only takes 1 or 2 cycles on PII if the 2 operands are both in >registers. also BSF/R are non-pairable, so you can't do 2 instructions at the same time when those are executed. >However there some problems with BSF/R instructions. >1. They are machine dependent. >2. There are no (BSF/R) operators in C or C++ compliers. You have to > use them as asm inline. > eg: > int bit_string; > int index_first1; > _asm index_first1, bit_string > > After you disassembly the above, you will find the compiler > generated code is far from optimal. Compiler will treat index_first1 > and bit_string as memory operands, and reload them each time > it encounter them. The memory reloads also harms the optimization > of the inline c/c++ neighbor codes. Thanks for the explanation. This means clearly that at Intel processors the hardware isn't the only problem for bitboards, compilers too. Vincent
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