Author: Gian-Carlo Pascutto
Date: 12:32:43 12/17/02
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On December 17, 2002 at 14:47:43, Matt Taylor wrote: >On December 17, 2002 at 14:38:22, Gian-Carlo Pascutto wrote: > >>On December 17, 2002 at 12:50:48, Matt Taylor wrote: >> >>>Actually it doesn't work like that. The CPU has an existing bandwidth of 3 >>>micro-ops/cycle. >> >>I was under the impression the P4 was much more limited than that >>(don't remember the details though). > >1 micro-op/cycle from the decoder to the trace cache, 3 micro-ops/cycle from the >trace cache to the execution units. They get around the former limitation by >caching the decoded output. Yes, this is what I remembered indeed. 8000 microops is going to be a *tight* space to fit an entire chessprogram in. If you're running out of that cache, there's no way to make use of the HT, is there? > >>>Now, I am no parallel researcher, but even my parallel code doesn't suffer >>>overheads so large that it can't gain from HT. >> >>Depends on what the problem is. > >You mean it depends on whether or not it's a parallel problem. Some problems are harder to parallelize with good efficiency. -- GCP
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