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Subject: Re: Resources about rotated bitboards

Author: Robert Hyatt

Date: 08:14:22 01/18/04

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On January 18, 2004 at 06:42:22, Alessandro Damiani wrote:

>>>As Gerd said, the two additional instructions can be put into the SlideIndexXX.
>>>I am going to test the smaller tables.
>>
>>While I am not doing it exactly as he does, I found the 75% memory reduction
>>helped performance.
>>
>
>Mmmh. Currently by switching to the smaller tables worsened performance by about
>25%. I could improve it a bit (register calculation instead of table look-up),
>but it is still about that margin slower. Maybe it has to do with my old
>machine, a Pentium II 450MHz (512kByte L2 cache)??
>
>puzzled
>
>Alessandro


In my code, +all+ that changed was reducing the array from
attacks[64][256] to attacks[64][64].  _nothing_ was added, no extra
shifts, or anything.  So all I changed was to reduce the L1/L2 cache
footprint by 75%.  I already had to do the shift/and, so I just added one
to the shift amount, and reduced the and mask to 6 bits.

If you have to add anything else to support this, then it might cost more
than it saves, but for me it was a _pure_ 96kb cache reduction per table and
there are 4 of them.  I now need 128kb total for all the attack tables,
rather than 512kb.




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