Author: Tom Kerrigan
Date: 10:43:52 08/25/04
Go up one level in this thread
On August 25, 2004 at 10:52:23, Robert Hyatt wrote: >My issue was _never_ "cache misses". It was _always_ "how big does cache have >to be to contain enough of Crafty to not have many misses?" Sure, that makes sense. Your issue was cache misses, not cache misses. >The answer is obvious from _either_ set of data. There are definite "points" >where cache size increases for either instructions or data stop reducing the >misses. That is the cache size that contains nearly everything, and it gives a >pretty good benchmark for the instruction or data working set sizes. Now we're getting into a semantic argument. If that's how you want to define working set, fine. I'm defining it as the point where enough of Crafty is in cache that main memory performance doesn't make a significant (measurable?) difference. >I _knew_ that you would be unable to see the forest for the trees. And that >posting the numbers would only serve to divert the conversation to a _different_ >topic, which it has. Yeah, the fact that you have a new, contradictory set of data throws a wrench into the whole "drawing conclusions from data" thing, doesn't it? Seriously, your new data shows miss rates that are different by factors of > 4 and a completely different trend between cache sizes. Sorry if this kinda thing "cramps your style." -Tom
This page took 0 seconds to execute
Last modified: Thu, 15 Apr 21 08:11:13 -0700
Current Computer Chess Club Forums at Talkchess. This site by Sean Mintz.