Author: Vincent Diepeveen
Date: 07:29:36 01/30/05
Go up one level in this thread
On January 30, 2005 at 09:51:21, Matthew Hull wrote: >On January 30, 2005 at 08:39:32, Vincent Diepeveen wrote: > >>On January 30, 2005 at 00:28:47, Matthew Hull wrote: >> >>>On January 30, 2005 at 00:02:42, Robert Hyatt wrote: >>> >>>>On January 29, 2005 at 14:03:00, Vincent Diepeveen wrote: >>>> >>>>>On January 29, 2005 at 11:35:54, Robert Hyatt wrote: >>>>> >>>>>>On January 29, 2005 at 08:20:07, Jason Kent wrote: >>>>>> >>>>>>>It looks like by the third quarter of this year, both intel and amd will be >>>>>>>selling dual cores. Are they basically handled as two processors under task >>>>>>>manager, and software? I'm guessing this is going mean that to get the most out >>>>>>>of your cpu, you will have to buy all the Deep versions. Maybe that is why SMK >>>>>>>decided to seperate the programs? >>>>>>> >>>>>>>Jason >>>>>> >>>>>>Dual cores will be two cpus with shared cache. This means your old dual-cpu MB >>>>>>will have four real processors, or your old quad-cpu MB will now have 8 cpus. >>>>> >>>>>Actually each cpu will have for each core its own L2 cache. So at a single dual >>>>>core cpu you will have 2 L2 caches. One for each core. >>>>> >>>>>That's both the case for intel and for AMD. >>>>> >>>>>Vincent >>>> >>>> >>>>Yep. Each pair of cores will have a shared local memory. Was thinking of this >>>>new NUMA issue when I wrote that. I'll be able to post some performance numbers >>>>before too long, but I can't at present... >>> >>> >>>I was curious if you would treat a group of MCMs (multi-chip modules - IBM >>>terminology) as all NUMA or if it would be more efficient to design it as some >>>kind of mix of NUMA and SMP. >> >>You mean at a cluster? > > >Negatron. There is SMP, and there is NUMA. Then you have a combination, where >two are SMP, but they are grouped in a NUMA configuration with other "duals". > >IBM's 64-bit NUMA machine is like this, where you can have 8-way SMP modules, >that are then grouped by fours for a 32-way NUMA machine. I hope you realize there is a lot of difference between the latencies at a supercomputer versus a dual opteron. At a supercomputer getting 8 bytes of memory can take easily 5.8 us on average (Origin3800). At a highend network it can easily go up to 20 us. This where memory at a dual opteron when you get it from the other cpu's memory controller, still gets served faster than memory at a quad Xeon which is fully SMP. Actually dual Xeon/K7 serve about at 400 ns. A single cpu accessing local memory at opteron is roughly 133 ns. The only 2 programs i know that work very well at a full blown NUMA supercomputers with X microsecond latency (X > 4 ) are DIEP and Hydra. No other modern engines do. Vincent
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