Author: Robert Hyatt
Date: 08:53:52 01/30/05
Go up one level in this thread
On January 30, 2005 at 00:28:47, Matthew Hull wrote: >On January 30, 2005 at 00:02:42, Robert Hyatt wrote: > >>On January 29, 2005 at 14:03:00, Vincent Diepeveen wrote: >> >>>On January 29, 2005 at 11:35:54, Robert Hyatt wrote: >>> >>>>On January 29, 2005 at 08:20:07, Jason Kent wrote: >>>> >>>>>It looks like by the third quarter of this year, both intel and amd will be >>>>>selling dual cores. Are they basically handled as two processors under task >>>>>manager, and software? I'm guessing this is going mean that to get the most out >>>>>of your cpu, you will have to buy all the Deep versions. Maybe that is why SMK >>>>>decided to seperate the programs? >>>>> >>>>>Jason >>>> >>>>Dual cores will be two cpus with shared cache. This means your old dual-cpu MB >>>>will have four real processors, or your old quad-cpu MB will now have 8 cpus. >>> >>>Actually each cpu will have for each core its own L2 cache. So at a single dual >>>core cpu you will have 2 L2 caches. One for each core. >>> >>>That's both the case for intel and for AMD. >>> >>>Vincent >> >> >>Yep. Each pair of cores will have a shared local memory. Was thinking of this >>new NUMA issue when I wrote that. I'll be able to post some performance numbers >>before too long, but I can't at present... > > >I was curious if you would treat a group of MCMs (multi-chip modules - IBM >terminology) as all NUMA or if it would be more efficient to design it as some >kind of mix of NUMA and SMP. A single chip will look like a dual SMP box. One large local memory shared by both processors. A dual-chip box will look like a NUMA box with 1/2 of memory close by, 1/2 will be one hop away. A quad will appear to have 4 SMP dual nodes, each with 1/4 of memory local. The 4 nodes are NUMA, with 1/2 of total memory 1 hop away, and the remaining 1/4 of memory two hops away. yes, to do it right, your program has to be aware of this and take care to get the right threads on the right processors (or if you use processes rather than threads get the right processes on the right processor). It tends to get pretty architecture-specific for tuning issues.
This page took 0 seconds to execute
Last modified: Thu, 15 Apr 21 08:11:13 -0700
Current Computer Chess Club Forums at Talkchess. This site by Sean Mintz.