Author: Vincent Diepeveen
Date: 10:35:02 01/31/05
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On January 31, 2005 at 13:03:43, Robert Hyatt wrote: >On January 31, 2005 at 10:14:28, Vincent Diepeveen wrote: > >>On January 31, 2005 at 10:01:16, Vincent Lejeune wrote: >> >>> >>>news from 28/01/05 (more to come) >>> >>>http://hydrachess.com/hydra-scylla.html >>> >>>32 nodes (previous version has 16) , no information about CPU power and FPGA >>>cards yet ... >> >>It's 4 nodes. >> >>1 node = 8 processor Xeon. >> >>FPGA cards would get double speed. So must be between 30Mhz and 60Mhz. They only >>use development fpga cards. So never use the real power of fpga (which is >>printing your own processor which can run hands down at 600Mhz or more). They >>stick to development cards for some unknown reason to me. >> >>CPU power is not interesting at all of course, cards do the work. >> >>Vincent > >I hope not. Old machine used 8 boxes with 2 cpus per box. Going to 8-way xeons >is a performance killer. The PCI bus just can't keep up. Ok the sheikh nor his righthand didn't know himself very well the architectural details which we will forgive them. I have accurate information now. It is a 32 node system. With each node a dual. They have however 32 FPGA cards because when ordering the person filling in the form (and i am NOT going to post who it was, but it was NOT the sheikh) confused nodes for cpu's. So they have a mighty 32 node myrinet now with 64 processors. However 32 cards so they run 64 processor effectively while serving with 32 cards which do the job. Cards at 55Mhz. Please note that PCI bus isn't the problem. They are using pci-x. Latency of one way pingpong is around 2.7 us with myrinet. That excludes the router costs which will be also at about 1 us i guess for random data traffic (up to 35 ns for bandwidth traffic). Vincent
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