Author: Robert Hyatt
Date: 10:58:52 01/26/00
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On January 26, 2000 at 12:58:07, Ed Schröder wrote: >On January 26, 2000 at 10:03:47, Robert Hyatt wrote: > >>On January 26, 2000 at 03:07:42, Ed Schröder wrote: >> >>>On January 25, 2000 at 23:57:33, Ernst A. Heinz wrote: >>> >>>>> In a one by one setting it does not matter at all. >>>> >>>>Still not convinced: a quiescence node that produces a direct >>>>"stand pat" cutoff obviously generates less work than one >>>>which fails to do so -- even in hardware! *** QED *** >>>> >>>>Or am I missing something? >>>> >>>>=Ernst= >>> >>>Something else... I always wondered about this free 4-ply evaluation. I >>>can understand that evaluation for the current position done in hardware >>>is possible in a few cycles. I can't understand this also to be true for >>>4 plies as it should involve: search, hash table, q-search etc. In other >>>words a complete chess program. >>> >>>Ed >> >> >>They didn't do this as you describe. The chess processor did a traditional >>alpha/beta search to a depth of 4 (this was user-settable, but going deeper >>in the hardware meant going shallower in software) followed by a traditional >>quiescence search and _then_ the hardware evaluation. >> >>This means that the 4 ply search is _not_ done in 10 clocks... only the >>evaluation. The 4 ply search takes a variable amount of time depending on >>the position. > >So there is no free 4 ply evaluation at all. Makes sense. Must have >misunderstood in the past. > >Ed Right.. the evaluation is "free" because it is so fast. But the 4 ply search runs just like any other 4 ply search, except it is far faster than any single cpu today can run it (remember, 2 to 2.4M nodes per second search speed on a single chip). So the chess chip ends up looking like a "little computer" that can do 4 ply searches, + extensions, + a q-search, + a complex eval, and it does all of that at roughly 10 cycles per node, where a chess program typically takes 4000 cycles and up per node... But the chip is very much like a 'mini chess program complete with everything.' They didn't do hashing, but they had a hash interface built into them, but according to Hsu he didn't have time to build a 16-way ported shared memory for the 16 processors on a single SP cpu.
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