Author: Albert Silver
Date: 07:23:39 03/06/00
Go up one level in this thread
On March 05, 2000 at 20:41:26, Robert Hyatt wrote:
>On March 05, 2000 at 15:44:41, Tom Kerrigan wrote:
>
>>On March 05, 2000 at 14:38:16, Eugene Nalimov wrote:
>>
>>>You forget that P6/PII/PIII can run at much faster frequence - exactly because
>>>of a longer pipeline (and P5 is no exception here, please look at the PPC - it
>>>also have a very short pipeline, so it cannot run fast enough to remain
>>>competive with Intel). So when you are comparing them at the same frequence you
>>>are not doing the right thing.
>>
>>Yeah, it's an oversimplification of the issue. There are other things to
>>consider, too, like uops vs. x86 ops, and the P6's "extra" load/store units. I
>>think the argument got pretty far off-topic.
>>
>>But I still think that saying the P6's pipes are more full than the P5's pipes
>>without proof is pretty ballsy, for the reason I explained.
>>
>>-Tom
>
>
>The proof is intuitively obvious to the casual observer, and only takes a bit
>of reasoning to expose: Why do you suppose Intel dumped the p5 core, and burned
>all those transistors making the p6 core, if they weren't convinced, beyond a
>shadow of a doubt, that the p6 core was better for the general case?
You obviously don't read here attentively enough. If you did, you would have
stumbled inuitively onto the truly obvious answer: it's a plot.
>
>The answer is they wouldn't have don't it. They run zillions of simulations
>to predict peformance before they commit something to silicon. An experienced
>assembly programmer can look at how the two machines operate and intuit that
>the p6 is better...
Possibly, but do you consider an experienced assembly programmer as the typical
'casual observer'? :-)
Albert Silver
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