Author: Robert Hyatt
Date: 07:57:49 03/06/00
Go up one level in this thread
On March 06, 2000 at 00:44:04, Tom Kerrigan wrote:
>On March 05, 2000 at 23:28:55, Robert Hyatt wrote:
>
>>>Yes, I know exactly how all of this stuff works. I'm still only interested in
>>>the concrete improvement (and not necessarily for the x86). I thought I made
>>>this extremely clear a few posts ago. If you don't have any actual data, I'm a
>>>little confused as to why you're replying to my posts.
>>I'm not www.intel.com. Go there, and read. You will find the data you
>>want, with a detailed explanation of both processor architectures and real
>>details on why the register renaming is an issue. I think MIPS was the
>>first to use this idea, but it makes sense.
>
>I think you misread again. I wrote "I know exactly how all of this stuff works."
>You are wasting your time by explaining it over and over and over.
>
>And I have been to www.intel.com. I spent almost an hour searching for this
>stuff and I could not find it.
>
>Evidently you have found what I'm looking for. ("You will find the data you
>want, etc.") I would really appreciate it if you posted the URL of this data.
>
>-Tom
I haven't looked for it in 3 years. When the p6 first came out, they had
several white papers on their web site. they gave lots of details about the
'instruction pool' and so forth in one. In another they gave a lot of
simulated results on the advantages of the p6 over the p5. Etc.
I wasn't aware that they removed things, but it is certainly possible that this
stuff was either (a) removed or (b) buried so deeply it is hard to locate. I
don't find their website particularly easy to get around in, personally, so
the latter is more probable.
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