Author: Vincent Diepeveen
Date: 09:29:01 09/27/00
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On September 26, 2000 at 13:51:17, Larry Griffiths wrote: >I was looking at these URL's. > >http://members.tripod.com/~RyanMack/computer.htm >http://members.tripod.com/~RyanMack/hypertech.htm >Does this look promising for bitboards? >Larry. The guy who wrote this nonsense is completely sick and knows very little from software and even less from hardware. First of all he doesn't seem to know the difference between assembly and between c++, secondly he's confusing generation speed of a program with search speed. Note that DIEP GENERATES about 15.5M nodes a second on a 450Mhz PII processor, but that its search speed is a 1000 times less. Searching at a couple of million nodes a second in an efficient way is simply impossible when using alfabeta+nullmove with a quiescencesearch. just minimaxing is of course no problem, but you'll end up searching 6 ply or so then. like 100 clocks a node in assembly at the intel processor is impossible, especially with bitboards. Also he quotes Bob wrong. You don't suffer 15-20 penalties from a memory reference, the latency of fast 133Mhz SDRAM is already more than that. The fastest 133Mhz SDRAM-222 needs 7.5ns x 10 = 75 clocks latency. The fastest PC800 memory needs 1.25ns x 15 = about 19 clocks latency Now we didn't talk yet about the 266PII with the real slow 66Mhz SDRAM which this guy has... If 'his' hyperbola suffers penalties because of misprediction, and you sure will suffer a lot of those when searching, then you suffer for each misprediction at least 10 clocks. A few branches and you're already slower as what he quotes. This guy is completely crazy and nuts and he sure knows nothing from programming. Sounds more like a lunatic who has written some stupid nonsense and i sure don't know why and what for, but it looks more like a vendetta against Bob for no reason.
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