Author: Pete R.
Date: 09:11:19 10/27/00
On Monday AMD will introduce the new 760 chipset (and matching Athlon chip) that will raise the front side bus speed from 200 to 266Mhz and support 266Mhz DDR SDRAM. I am wondering if chess programs are currently under any performance constraints with existing memory speeds, or if processor speed or something else (such as inherent chess program design) is a limiting factor that would make the additional memory bandwidth moot. Any thoughts?
This page took 0 seconds to execute
Last modified: Thu, 15 Apr 21 08:11:13 -0700
Current Computer Chess Club Forums at Talkchess. This site by Sean Mintz.