Author: Richard A. Fowell (fowell@netcom.com)
Date: 23:56:43 01/10/98
Since the perennial:
"how would Rebel/Hiarcs/etc. do if they had the same nps as Deep Blue"
topic is threatening to resurrect itself, it occurred to me that I
might not have posted this summary of a few nuggets of information
about Deep Blue's internals that were published in IEEE Computer
Magazine, Oct. 1997.
=====================================================================
Hamilton, Scott, and Garber, Lee, "Deep Blue's Hardware-Software
Synergy",
Computer, Oct. 1997, pp. 29-36.
The 7-page article discusses Deep Blue's ASICs in some depth.
The article is based on interviews with Hsu and Campbell, and Campbell
reviewed early drafts, so hopefully the facts are mostly correct.
Some tidbits:
* The ASIC evaluation function recognizes roughly 6,000 features
in hardware.
* The weights of these features can be adjusted by the governing
software on every move (!)
["Program software recomputes the evaluation coefficients after
each move, and downloads new values to the ASIC"
p.32, 3rd from last paragraph]
* "On-chip evaluation now comprises about two-thirds of the chip area"
* "the endgame heuristics and a few small endgame databases
are actually on the chip"
* The choice of weights was largely tuned manually with the aid of
visualization tools.
* The team believes that Deep Blue's evaluation function is now
superior to those of the top commercial programs.
(first para, page 32 - which also refers to single-chip matches
against other programs in "debugging mode")
* The ASICs are 1.7 million transistors in 0.6 micron technology.
fowell@netcom.com (Richard A. Fowell)
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