Computer Chess Club Archives


Search

Terms

Messages

Subject: Re: 64-bit processors

Author: Ralf Elvsén

Date: 03:41:14 01/17/01

Go up one level in this thread


On January 16, 2001 at 18:49:06, Robert Hyatt wrote:

>On January 15, 2001 at 23:29:42, Larry Griffiths wrote:
>
>>On January 15, 2001 at 20:15:17, Ralf Elvsén wrote:
>>
>>>I looked ay the instruction set for the Itanium processor.
>>>As far as I could see there was no instruction to get the first/last
>>>bit set.
>>>
>>>Can someone with insight in processor design describe the
>>>considerations done by the designers when they decide to
>>>include or to not include such an instruction? (Assuming they
>>>are not chess programmers :)
>>>
>>>Is it possible to quantify how the "trouble" to include
>>>it scales with the number of bits? I.e. is it even less likely
>>>to be found in an 128-bit processor?
>>>
>>>Ralf
>>
>>I asked this question a while back.
>>
>>I think IA32 instructions might still be supported and maybe the BSF BSR
>>instructions are still available.
>>
>>Maybe you can verify this.
>>
>>Larry.
>
>
>I actually think that they are not supported if I recall Eugene's comments
>correctly.  It is possible to find which byte is non-zero in a 64 bit word,
>but I think it then requires a 256-entry table look-up to find the set bit.

There is an instruction which tells you which byte (or which 16-bit
field if you prefer that) is the first/last to have only zeros. This
doesn't sound as useful as the one you describe. If the one you describe
exists I missed it.

Ralf



This page took 0 seconds to execute

Last modified: Thu, 15 Apr 21 08:11:13 -0700

Current Computer Chess Club Forums at Talkchess. This site by Sean Mintz.