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Subject: Re: Is there a difference between SDRAM and DRRAM for chess comp? (nt)

Author: Robert Hyatt

Date: 08:12:37 03/29/01

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On March 28, 2001 at 16:29:22, Rajen Gupta wrote:

>No one knows as yet
>
>rajen gupta


The question is all about latency.  Quite often we see effective memory
speeds increase by simply fetching more data at one time.  But in doing so,
it is also common for the latency to slip a bit.  For programs that are doing
regular-pattern memory accessing, this trade-off is usually a big win.  But
for programs (notably chess programs) with more random access patterns, the
burst speed isn't as important as the raw latency is.  And there, rambus seems
to be hurting.

However, as a comparison point, my quads all use plain old EDO ram with 4-way
interleaving to ramp up the effective speed.  They are fast as hell...



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