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Subject: Re: to bob re:hsu's chip

Author: Robert Hyatt

Date: 20:45:00 04/27/01

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On April 27, 2001 at 16:37:14, Vincent Diepeveen wrote:

>On April 26, 2001 at 22:28:21, Robert Hyatt wrote:
>
>>On April 26, 2001 at 22:10:14, Robert Raese wrote:
>>
>>>On April 26, 2001 at 19:58:43, Robert Hyatt wrote:
>>>
>>>>On April 26, 2001 at 18:11:20, Rajen Gupta wrote:
>>>>
>>>>>hi bob: you mentioned in you recent post regarding hsu's chip being capable of
>>>>>doing 1 billion nodes per sec-is this an advanced version of the "chess chips"
>>>>>which were present oin the deep blue?-as far as i remember the deep blue had a
>>>>>number of general purpose powerpc processors and a number of what they termed
>>>>>"chess chips" if this is so
>>>>
>>>>NO... here is the math.  DB2 used 480 chess processors.  About 1/2 of the
>>>>processors ran at 20mhz, the other half ran at 24mhz.
>>>
>>>ok this is probably a stupid question, but isn't 20mhz kind of slow for such
>>>advanced hardware?  what am i missing?
>>
>>Not particularly.  These are ASICs and they do a _bunch_ per cycle.  In fact,
>>it takes just 10 clock cycles to handle one node...  That translates to
>>several thousand machine language instructions for the typical chess problem.
>>
>>20mhz was slow.  Hsu had planned on a 15X faster chip without really pushing
>>the fabrication limits of today...  He even posted once that 30M nodes per
>>second per chip was easily doable...
>>
>>Don't confuse 20mhz in a special purpose finite state machine vs 20mhz in
>>a microprocessor...  they are really not comparable...
>
>such a chip with nullmove and with all kind of enhancements like
>SRAM on chip to use a small hashtable, now that would be interesting.
>
>Of course both features slow down NPS huge, but that's no big deal if
>you do so many millions a second!
>
>Also can use my evaluation then on chip. Going to be quite a bit of
>clocks though as tough code needs other tough code to in the
>end again combine things. So 10 clocks is, unless more sequential things
>can be done in a clock nowadays as in 1997, not possible anyway,
>which will be no problem as using a hashtable is going to slow down
>things most.
>
>Would be real interesting to see how fast something like that gets!
>
>What i really do not understand is why Hsu never put hashtables at
>his chips. Didn't he have enough budget to do that or was this in
>1997 technical quite hard?
>
>I'm pretty sure that also in 1997 there was SRAM!
>


SRAM is made of nothing but transistors... not capacitors.  Which means SRAM
takes a lot more space.  But then it is _not_ slow.  That is what register files
are made of.

The chess chips have a memory addressing scheme built in already.  But Hsu
didn't have time to design and build the memory system (16-ported for 16
processors on a single board) in time for the 1997 match.  It was doable...
and at a 20mhz clock speed it wouldn't have slowed things down one iota...

>Best regards,
>Vincent



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