Author: Robert Hyatt
Date: 11:17:03 06/05/01
Go up one level in this thread
On June 05, 2001 at 12:31:30, Gian-Carlo Pascutto wrote: >On June 05, 2001 at 11:57:12, Gian-Carlo Pascutto wrote: > >>On June 05, 2001 at 11:49:20, Daniel Clausen wrote: >> >>>Second, there are processors which use more than 1 bit for branch prediction. >>>(I think the Sparc-architecture is one of them, but I'm not sure) So >>>recognizing simple patterns like 101010 or thelike would not be a problem for >>>such architectures either. >> >>The branch predictors on x86 also can do this and much more. >> >>They can recognize quite large patterns. I once stumbled upon >>a site that had a great explanation of how it works, but I >>dont remember the link (maybe it was at Dr Dobbs) > >http://x86.org/articles/branch/branchprediction.htm > >-- >GCP Part of that looks wrong. The usual idea has always been "If a branch target has not been seen previously (which means no prediction entry is avaliable) then look at the _direction_ of the jump. If it is backward, assume it will be taken (a safe assumption since a backward branch is likely a loop) while if it is forward, assume it is not taken. I had seen someone from Intel claim this is what they do, although I am not certain. That is easier to do in the hardware than to assume that if it is taken, move it to ST and go from there...
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