Author: Christophe Theron
Date: 19:30:58 09/19/01
Go up one level in this thread
On September 19, 2001 at 20:04:42, Ian Osgood wrote:
>On September 19, 2001 at 17:48:15, Christophe Theron wrote:
>
>>On September 19, 2001 at 05:02:53, David Blackman wrote:
>>
>>>On September 18, 2001 at 13:51:07, Ian Osgood wrote:
>>>
>>>>Has anyone run across a chess program written in Forth? I ask because I
>>>>recently ran across an asynchronous processor design optimized for Forth
>>>>(designed by the creator of Forth, in fact) which claims 2.4 Bips (or 60 Gips
>>>>for the 25x parallel version) dissipating only 10mW.
>>>>
>>>>Link: http://www.mindspring.com/~chipchuck/25x.html
>>>>
>>>>Ian
>>>
>>>That particular chip has 384 words DRAM and 128 Words ROM for each processor. A
>>>strong chess program needs a lot more memory than that, and will spend most of
>>>its time going to the much slower off-chip ram.
>
>Note: this chip is designed to interface with SDRAM with 10ns sequential access
>times (i.e. as fast as cache memory). In fact, they were having trouble
>interfacing with DRAM because their chip's signals were too fast!
>
>>> Also the 2400 Mips is not quite
>>>the same as other poeple would count Mips. A forth chip instruction doesn't do
>>>much. So don't expect this chip to be an unbeatable monster chess machine.
>
>I would argue that most any machine instruction doesn't do much. Load and store
>from registers and memory plus simple arithmetic and tests make up the majority
>of code in any program. This Forth chip has all of those working at the
>equivalent of one cycle.
>
>I am still curious about its chess performance, but I think it would require a
>Forth guru to transfer existing chess expertise efficiently to Forth.
>
>>As a chess programmer I often wish I had faster instructions at my disposal,
>>even if they were doing less. Maybe I could adapt to this 27 instructions and
>>take advantage of the speed.
>>
>>384 registers is not so bad when you think about it. At least I know what I
>>would do with 64 of them, if you see what I mean. Having the chessboard in
>>registers is a dream for a chess programmer! Together with the 16 levels stack
>>and the remaining registers, memory accesses would be very sparse. I don't think
>>that memory bandwidth would be a problem.
>>
>>I find the design of this chip very interesting. However it is true that it has
>>been around for a while (at least the f21 and x18), so if it was as great as it
>>seems then certainly you would find it at the heart of many handhelds. But it's
>>not the case. So I wonder what the catch is (the 18 bits address bus and word
>>length maybe?).
>
>The biggest catch is having to think in RPN! Forth is a very simple and compact
>interpreted language.
I think it is possible to find (or write) a C compiler for this Forth chip.
A few years ago I have created for a commercial company a language which
resembles Basic. It was composed of a compiler, which produced P-Code, and an
interpreter, which executed the P-Code.
The P-Code was based on a virtual stack machine that looks a little bit like
what this Forth chip implements. Actually it is quite "easy" (well everything is
relative) to compile a high level language if your goal is simply to produce
code that can be executed by a stack machine.
Naturally, optimizing the produced code is another story, but I don't see why it
would be more complex than for a "classic" processor.
Looking at the specs of the Forth chip, I see other problems:
* 18 bits address bus => 256K words max address space (a little bit more than
512Kb).
* 18 bits words: this is completely non-standard. I remember an old Multics
computer at my university using 18 bits words, but it was a prehistoric monster.
You would have problems using this word size with standard C (at least forget
about using standard C libraries).
* the return stack is limited to 16 levels: you would probably have to bypass
this stack and create your own (or to add expensive logic around the existing
stack management) to avoid return stack overflows.
> It can be implemented in as little as 2K (!). Thus, it
>has found a niche in embedded systems and prototypes. I believe they are aiming
>this chip at the embedded market (set-top web boxes). However, they have to
>develop all their own software for it.
>
>Chuck Moore, the inventor of Forth and these chips, is quite an iconoclast. He
>actually wrote his own PC Forth OS and Forth VLSI CAD system to design and
>simulate these chips. He can't understand why people buy big bloated operating
>systems instead of writing their own. :)
He is a wise guy! :)
>When I saw how deplorable their Forth chess program was (no quiescence, eval is
>simply material and kings on first rank until the endgame), I started porting
>TSCP to Forth for fun. What a headache! Migrating from C to Forth is hard; you
>lose types and structures and local variables and all your C idioms. Forth is a
>*very* idiomatic language, from what I can tell. Without knowledge of common
>patterns, efficient Forth looks like so much line noise. Definitely a language
>for Real Programmers (TM).
I don't program x86 processors in assembly, so I don't feel like I would be
forced to program the X18 in Forth...
>I thought that a chess program would make a good benchmark for this chip because
>1) no floating point required, 2) requires little memory and small word size for
>a basic engine, and 3) it can give you a real metric, nodes per second, which
>this asynchronous chip currently lacks, having no clock speed as such.
The idea of this asynchronous processor is extremely attractive. No clock. Just
design it in a smart way and everything is executed as fast as your transistors
can switch. Hard to do anything faster on a silicon wafer.
Actually it looks like it has a clock: a series of 14 Nand gates are used to
create a delay, and an instruction is fetched each time the signal has passed
these 14 gates. So all the instructions must be executed in less time than 14
"Nand switches".
There are only 27 instructions, so they can all be coded on 5 bits. Each 18 bits
word contains 3 instructions.
I recommend reading the specs of this chip if you like beautiful technology.
It's so incredibly well designed that at first I thought it was a joke.
Christophe
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