Author: Tom Kerrigan
Date: 18:43:35 10/26/01
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On October 26, 2001 at 21:19:11, Robert Hyatt wrote: >>"The floating point unit has 32 32-bit non windowed registers, which must be >>saved on a per-context basis" > >Memory fails as age increases, apparently. :) Maybe FPUs are studied in a semester of comp org that you didn't teach. >There is only _one_ data path _into_ the CPU. I was originally talking about >the 64 bit chunks that can flow into the cpu from outside. And that is a >real bottleneck on Intel boxes, still. IE you can't possible load >instructions, int data, and fp data, fast enough if you have to use memory. >And the classic SPEC benchmarks tend to stream data like crazy... This is going off on a tangent; Intel's decision to use a 64-bit FSB is almost certainly based on price/performance goals and not the bitiness of any processor internals. The FSB is 64-bit, the L2 bus is 256-bit, the SSE datapaths are 128-bit, the x87 FPU is 64-bit (I believe), the core is 32-bit... all design decisions determined by any number of factors. It would have been a small amount of work to make the P4 a 64-bit chip instead of a 32-bit chip; this wasn't done almost certainly because the need for 64-bit is too small to justify a new instruction set. Or they didn't want the P4 to compete directly with the Itanic (and kick it in the nuts). AMD seems pretty happy to go the 64-bit route with x86-64 and minimal changes to the Athlon design. -Tom
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