Author: Jorge Pichard
Date: 12:42:54 12/16/01
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On December 16, 2001 at 15:18:26, Jorge Pichard wrote: >On December 16, 2001 at 15:11:14, Dan Andersson wrote: > >>If it's an AMD processor, it will be the Hammer core. And in theory it seems >>like the Godzilla of x86 processors. And there is even rumors or Intel adopting >>the AMD ISA for a project to put a fire under the butts of the Itanium crew. >> >>MvH Dan Andersson > >Thanks, but he told me NOT to provide too much technical details. It will use >some of the HyperTransport™ Technology: Defining Hammer: Judging a book by its cover alone would mean that AMD's Hammer architecture would be used in the first 64-bit x86 microprocessors. We already know that Intel has taken a route away from x86 for their 64-bit solution, Itanium which uses a new instruction set architecture (ISA) called EPIC. The point of this article is to not only examine the pros and cons of AMD's extension of the 32-bit x86 ISA but also the rest of the story when it comes to Hammer since there is a lot more to this architecture than a few more registers and greater memory addressability. To understand the controversy surrounding the 64-bit solutions from AMD and Intel you have to realize that the x86 ISA is far from the most desirable platform to work with. In fact, today's x86 processors spend a large amount of time working around the limitations of the x86 ISA. The reason it has lasted this long is mainly because of such a large installed user base and although Intel's Itanium processor uses a new ISA it will be many years before that architecture comes down to the mainstream level. What makes Hammer special extends far beyond its ISA but we will first focus on that. AMD is hardly in a position to introduce drastic departures from the x86 ISA so the move to x86-64, an extension of the current 32-bit x86 ISA makes a lot of sense. And just because AMD isn't killing off x86 doesn't mean that Hammer is doomed. We'll limit discussion on x86-64 but here are the main advantages: 1) backwards compatible with current x86 code 2) 8 new 64-bit general purpose registers (GPRs) as well as 64-bit versions of the original 8 x86 GPRs 3) SSE & SSE2 support along with 8 new SSE2 registers 4) Increased memory addressability for large dataset applications 5) Solid performance in current 32-bit applications with support for 64-bit applications going forward, a good transitional processor With that said here are the basic cons: 1) continues to build off of the x86 ISA which many will agree, needs to go the way of the dodo 2) the new GPRs are only usable under 64-bit mode, making any increases in 32-bit performance outside of the ISA enhancements There are many discussions on x86-64 alone, including our article from not too long ago but the focus of this piece is much more on the architecture behind Hammer rather than AMD's choice of an instruction set. So without further ado, let's learn how to make an already fast processor even better. Plus a combination of the HeperTransport Technology: >HyperTransport technology is a new high-speed, high-performance, point-to-point >link for integrated circuits. HyperTransport provides a universal connection >that is designed to reduce the number of buses within the system, provide a >high-performance link for embedded applications. It was developed to enable the >chips inside of PCs to communicate with each other up to 24 times faster than >with existing technologies
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