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Subject: Re: the empire strikes back

Author: Robert Hyatt

Date: 07:45:41 01/11/02

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On January 10, 2002 at 05:07:37, Tom Kerrigan wrote:

>On January 10, 2002 at 03:06:23, Gian-Carlo Pascutto wrote:
>
>>On January 09, 2002 at 17:12:11, Tom Kerrigan wrote:
>>
>>>>It's faster only because of the clockspeed. Granted, that is made
>>>>possible by the silly design, but it doesn't make it any nicer,
>>>>especially compared vs the Athlons.
>>>
>>>To rearrange your wording, the P4's design allows it to reach higher >clockspeeds which results in faster performance. Again, how is this "silly"?
>>
>>It's silly because they have to make it this way. It's faster
>>solely by means of clockspeed.
>>
>>>Do you want a chip that performs well or one that clocks slow? Seems like >you're asking for the latter.
>>
>>It's possible to make well-performing chips that clock slower :)
>>
>>I would just like to see a new chip and an innovative design with
>>real new features. The trend now is to make stupider chips that
>>run at a higher clockspeed. I would have found it more interesting
>>to see a slower clocked but smarter (and thus faster) chip.
>
>I can't believe you think the P4's design isn't innovative. It's the first x86
>chip to have a trace cache. Its branch predictor is probably the best ever made
>by anybody. It's the first chip that I know of that has a double clocked ALU. It
>has SMT logic (although not enabled currently). The list goes on. Basically,
>there's hardly anything about the P4 that _isn't_ innovative.

Do you remember the 486 DX4 and the like?  Even a triple-clocked ALU was done
years ago.

:)





>
>How do you know that a "smarter" chip would outperform a faster clocked chip? I
>think the POWER3, R12000, and SuperSPARC clearly prove that theory wrong, to
>name a few chips.
>
>Besides, how do you know it's even possible to make a smarter chip than the P3?
>The Athlon has more (and more capable) execution units than the P3 but doesn't
>have better IPC. This tells me that the ILP in today's x86 code has pretty much
>been tapped, and the _only_ way to make better performing chips is to clock them
>higher, even if it means sacrifices to IPC.
>
>-Tom



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