Author: Roy Eassa
Date: 10:28:57 01/21/02
Go up one level in this thread
On January 21, 2002 at 03:03:16, David Rasmussen wrote: >On January 20, 2002 at 23:43:21, Vincent Diepeveen wrote: > >>On January 20, 2002 at 22:02:10, Terry McCracken wrote: >> >>>Can anyone explain how and why a P-IV at 1.7 Ghz with 512MB (PC800) RDRAM >>>outperformed an Athlon running at 1.4 Ghz with 266Mgh DDR Bus and 256MB of SDRAM >>>on a Fritzmark by a wide margin? >> >>fritz might be in p3 assembly and has probably nearly no mispredicted >>branches somehow. further it is such a small program that it hardly >>needs data cache. >> >>The 3 major disadvantages from the P4 are >> a) HUGE branch misprediction penalty >> b) very SMALL datacache >> c) no way to do 4 instructions a second according to >> experts who read the design, it can to at most 3 >> instructions a second. >> > >Wow. 4 instructions per second is _slow_, let alone 3... > >:) Four hertz. Three REALLY hurts!
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