Author: Rafael Andrist
Date: 08:51:02 01/22/02
Go up one level in this thread
On January 21, 2002 at 18:38:44, Tim Foden wrote:
>maybe you could try something like this, which is shorter, and looks to be quite
>pairable. On the down side it uses 3 registers.
>
>Disclaimer: It compiles, but I haven't tested it to see if it produces the
>correct answer :)
>
>__asm
>{
> mov eax, square
> mov ebx, eax
> and eax, 0x07 // eax = x
> shr ebx, 3 // ebx = y
> mov ecx, 0
> sub eax, ebx // eax = x - y
> rol ecx, 4 // ecx = 8 * (x < y)
> add eax, ecx // eax = x - y + 8 * (x < y)
>}
Well, it certainly won't work because the ecx register will be allways 0. I
guess you meant rcl instead of rol, but then still, I need the carry flag to be
set before...
But thanks anyway and I will try to replace my adc/shl with rcl and gain at
least one clock cycle.
>>#else
>> int x, y;
>> x = iSqNr%8;
>> y = iSqNr/8;
>> return x-y + 8*(x-y < 0);
>>#endif
>
>It may help if you get your compiler to output the assembly code, or if you can
>look at it in a debugger, to see what it does when compiling the above code.
>Cheers, Tim.
Of course i had a look at the code, and it is horrible: 5 memory accesses and a
conditional jump. But it seems that the memory accesses are buffered by L1 cache
and the branch prediction almost correct although it's 50% chance for the jumps.
regards
Rafael B. Andrist
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