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Subject: Re: G4+ branch misprediction

Author: Dan Andersson

Date: 12:30:51 01/29/02

Go up one level in this thread

Sorry! I was less that clear in my wording. I eluded to the ratio between the
pipeline lengths of the different G# CPU's. And the ratio is definitelly larger
than one, moreso due to the previous very low stage count. I also realize that
it is only one of the factors slowing it down. Ramping a low power embedded
processor is close to madness, IMO. Go MIPS Apple, gawd'dagnit!

MvH Dan Andersson

• Re: G4+ branch misprediction Tom Kerrigan 20:48:32 01/29/02
  • Re: G4+ branch misprediction Dan Andersson 10:17:58 01/30/02
    • Re: G4+ branch misprediction Eugene Nalimov 10:37:41 01/30/02
      • Re: G4+ branch misprediction Dan Andersson 10:46:12 01/30/02
        • Re: G4+ branch misprediction Eugene Nalimov 13:44:26 01/30/02
          • Re: G4+ branch misprediction Dan Andersson 15:08:41 01/30/02
            • And I prefer the COSBI benchmark to the SPEC for several reasons. Dan Andersson 15:12:30 01/30/02
  • Re: G4+ branch misprediction Eugene Nalimov 22:00:19 01/29/02
    • Re: G4+ branch misprediction Vincent Diepeveen 05:27:06 01/30/02
      • Re: G4+ branch misprediction Eugene Nalimov 10:15:25 01/30/02
    • Re: G4+ branch misprediction Tom Kerrigan 23:45:29 01/29/02
      • Re: G4+ branch misprediction Eugene Nalimov 10:13:40 01/30/02
      • Re: G4+ branch misprediction Robert Hyatt 07:37:41 01/30/02
        • Re: G4+ branch misprediction Eugene Nalimov 10:14:12 01/30/02

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