Author: Tom Kerrigan
Date: 11:46:05 01/30/02
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On January 30, 2002 at 08:29:17, Vincent Diepeveen wrote: >P4's instruction cache is more than ok as they store different, They store different what? And why is it more than okay? The P4's trace cache holds 12000 instructions. >but the g4 how many bytes/instruction does it need for L1 cache and PPC instructions are 32 bits, like almost any other RISC processor. >with regard to datacache how big is a cacheline in the g4? I don't know. If I had to guess, I'd say either 64 or 128 bits. But I don't know why that would matter for anything. -Tom
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