Author: Wylie Garvin
Date: 15:37:35 03/02/02
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On March 01, 2002 at 23:16:11, Nolan Denson wrote: >Thanks all for the comments ..... any idea where i can get info about this pause >x86 ... basically I have the hardware and the upgraded bios ... The pause instruction is the two-byte instruction "F3 90". Notice that F3 is the "REP/REPE" prefix byte and 90 is the "NOP" instruction. Here is the description from Intel documentation: ---<snip>--- Improves the performance of spin-wait loops. When executing a "spin-wait loop," a Pentium 4 processor suffers a severe performance penalty when exiting the loop because it detects a possible memory order violation. The PAUSE instruction provides a hint to the processor that the code sequence is a spin-wait loop. The processor uses this hint to bypass the memory order violation in most situations, which greatly improves processor performance. For this reason, it is recommended that a PAUSE instruction be placed in all spin-wait loops. An additional function of the PAUSE instruction is to reduce the power consumed by a Pentium 4 processor while executing a spin loop. The Pentium 4 processor can execute a spin-wait loop extremely quickly, causing the processor to consume a lot of power while it waits for the resource it is spinning on to become available. Inserting a pause instruction in a spin-wait loop greatly reduces the processor's power consumption. This instruction was introduced in the Pentium 4 processors, but is backward compatible with all IA-32 processors. In earlier IA-32 processors, the PAUSE instruction operates like a NOP instruction. The Pentium 4 processor implements the PAUSE instruction as a pre-defined delay. The delay is finite and can be zero for some processors. This instruction does not change the architectural state of the processor (that is, it performs essentially a delaying no-op operation). ---<snip>--- Wylie
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