Author: Slater Wold
Date: 18:20:39 03/30/02
Go up one level in this thread
On March 30, 2002 at 19:03:02, Keith Evans wrote: >On March 30, 2002 at 15:25:17, Slater Wold wrote: > >>On March 30, 2002 at 09:49:10, Jeremiah Penery wrote: >> >>>On March 30, 2002 at 03:07:29, Slater Wold wrote: >>> >>>>Dan Corbit once called Crafty the "N-Reactor of Chess Engines". If this is >>>>true, I might be creating the worlds largest N-Reactor Chess Program. >>>> >>>> >>>>In the coming months, I will be working with a few people to create a hardware >>>>based move generator for Crafty. I myself have written my own chess program >>>>over the last few years, however find it inadequate for this project, mostly >>>>because it's too simple. (Man, I am a glutton.) A 10M nps (basic) alpha/beta >>>>search will prove nothing, while a "tried and true" engine like Crafty will >>>>truly show the power of nodes. How does a 2M nps Crafty compare with a 10M nps >>>>Crafty? Well, that's my question! >>>> >>>>The hardware will consist of a single FPGA on a PCI card that will be inserted >>>>into the host computer. The FPGA will be used for move ordering (and returning >>>>those moves in a predefined order) and generating all legal moves and passing >>>>them back to the software. >>> >>>Similarly to what Sune already said, just doing the move generator in hardware >>>will do nothing for Crafty in terms of speed. If you could do the evaluation in >>>hardware, that would really be something. >> >>That is simply wrong. Movegen accounts for about 1/2 of most programs. And >>doing evals in HW takes a HUGE ($300,000 FPGA) chip and a LOT of work. Can I >>borrow $300,000? ;) >> > >I have never seen an FPGA sell for that amount - you're possibly quoting ASIC >NRE for something like a .35 micron chip? It was an FPGA but I cannot remember where in the world I saw it now (looking for it now). And it was $365,000. They had the XCV8000 I believe, for $1500. But it *was* an FPGA. >You can get a Xilinx Virtex II XC2V4000 for about $2000. (Or was it $3000?) It >is a pretty huge chip - the CLB array is 80x72 (23,040 slices.) Xilinx quotes 4M >system gates - even if you derate that by a factor of 4 it's still 1M gates. I believe the DB chips did about 250,000 gates per chip. So 4M would be overkill. ;) >I would think that it would be sufficient. But it is a _lot_ of work to >implement Deep Blue - if it were easy it would have been cloned by now. And like >I mentioned in another thread doing just a movegen is not a bad place to start - >that's how Belle and Deep Thought started out. > >I believe that if you search through the CCC archives you will find the whole >subject of movegen discussed, and I believe that the conclusion was that it >doesn't take 1/2 of the processor time in the top programs. Also you need to >factor in the time that it will take for the processor to baby sit your move >generator. What exactly will you be passing over the PCI bus - are there >additional computations that a program must do to turn your data format into >something useful,... Marc Boule is currently working on an FPGA based move generator for his program MBChess. His thesis is almost complete. Marc got his program from about 2M nps to 10M nps using an FPGA for move ordering and movegen only. Most 1800 players would have little difficulty beating his chess program when it's software based only. Try to beat the HW program. ;) While I am not expecting this from Crafty, I am simply stating it can be done. More information on Marc Boule's thesis can be found at: www.macs.ece.mcgill.ca/~mboul >Regards, >Keith
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