Author: Robert Hyatt
Date: 07:30:10 07/12/98
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On July 12, 1998 at 10:03:11, Robert Hyatt wrote: >On July 11, 1998 at 22:56:36, Tom Kerrigan wrote: > >>Here's another review of what you said: >> >>>up to the PII/400, you begin to see a significant performance loss when compared >>>to a P6/200, factoring in the 2x faster clock not giving anywhere near 2x the >>>cpu performance. Xeon will. The 450 should clock in just as you'd expect with >> >>Now, I questioned the "not giving anywhere near 2x the cpu performance." Here's >>your response: >> >>>>Remember, the PII L2 cache *always* runs at half the core clock speed. >>>>If Crafty fit in L1/L2 cache, you *would* see a ~2x speedup. >>>The PII doesn't always run at 1/2. That's what the PII/Xeon is all about, >> >>Uhm, wrong. >> BTW, I should have added "if you'll check your own hardware spec sheet for the xeon, you will find that the above one line is not "Uhm, wrong." I don't recall who wrote "Remember, the PII L2 cache *always* runs at half the core clock speed." but I added the next line which says "The PII doesn't always run at 1/2, that's what the Xeon is all about." So I'm not sure what you are "Uhm, wrong'ing" here. The xeon certainly runs cache at cpu speed, not cpu/2 speed. >>I'd be happy to discuss the data you present to this forum, but not if your >>story is going to get this screwed up. >> >>-Tom > > >Then maybe you'd care to point out where the above is wrong. It is quite >clear: the 400mhz PII chip would be twice as fast with crafty, *if* the >PII's cache ran at 400mhz. It doesn't. It runs at 200mhz. So I fail to >see where you are confused about what I wrote and why. But there is *no* >misstatement in the above... simply read it in the context of the original >post, comparing the P6/200 to the PII/400. I reported 1.41X on the PII/300 >over the P6/200 and explained why I thought it was so. Seems perfectly >clear to me. > >So it's not *my* story that is screwed up. Perhaps you didn't follow the >discussion? > >I've been consistent from the beginning. Your quote above supports that.
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