Author: Robert Hyatt
Date: 21:01:52 07/12/98
Go up one level in this thread
On July 12, 1998 at 22:17:08, Tom Kerrigan wrote: >This is absurd. >We're talking about two products here, the PII and the PII/Xeon. >You can't assume the PII/Xeon is a PII and expect to be understood. Don't point the finger at me... I didn't come up with this absurd naming/numbering convention. The morons at Intel do this for various marketing reasons more than anything else. But the PII/xeon *is* a PII. Shouldn't be, but it is. Just like the 486/100 DX4 was a clock *tripled* 486, not quadrupled. The PII was a kludge after the pentium pro. Why the xeon isn't called a pentium pro, or pentium pro/mmx or god knows what else is anybody's guess. But as long as the superstar minds at Intel want to continue the "name game" I don't see any other choice than to play the game... > >Second, this is what I'm arguing with you about: > >* You say a PII/300 is "only" 1.41 times as fast as a PPro/200 because of the L2 >cache. Why don't you simply quote numbers for a PII/200 so the ratio of the core >clock speed to the front side bus speed is the same? That's the only scientific >way to do this without doing a tremendous amount of extra work. I thought I gave that. If I didn't, here is the chart: pII/200 .94 P6/200 1.00 PII/300 1.41 PII/333 1.56 PII/400 1.87 xeon/450 2.24 I have some 500mhz numbers but can't say anything just yet. Note that the last digit of the factors is "iffy" due to integer truncation. They are reproducible, but we could argue about whether 1.41 should be 1.40, 1.41 or 1.42, since any of the three could be mathematically correct. This is based on running crafty on the machines, and using the "bench" command which runs six test positions for 1 minute each, then computes the NPS and normalizes against the P6/200.. All times with MSVC 5.0, service pack unknown... > >* You say the PII/400 isn't nearly 2 times as fast as a PPro/200 because of the >L2 cache. Now, if the PII/300 is 1.41 times as fast, and you get perfect scaling >with a PII, why isn't the PII/400 over 1.8 times as fast? 1.8 is damn near 2... > >-Tom close only counts in horse shoes and hand grenades. On a quad processor, you lose almost 1 pentium pro processor's worth of compute power. 1.8 is not bad, but it isn't 2. The xeon finally delivers that full 2... *for crafty*. As I said, there are benchmarks that make a cray look great and a xeon look like a pocket calculator, if you want to fry the memory bus and not make effective use of cache. Crafty doesn't seem to do that, based on tests I have run on my ALR. Different subject: My ALR has 4 P6/200 processors. I can run one crafty, using one processor, and say "bench" and 6 mins later I get 1.0 as the factor. If I run 4 separate crafty's, and do the same, I get 4 1.0's showing that I am not toasting memory. I have a big matrix multiply that blows cache out... one copy takes 52 seconds, 2 takes 59, three takes 66 and 4 takes 72. Quite a bit of overhead there, and it's all caused by memory bandwidth... even though the ALR uses 4 way interleaving and reads 32 bytes at a time from each of 8 SIMMS. That barely offsets that lousy 66mhz bus speed if you make good use of cache. If you don't, it dies, still...
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