Author: Robert Hyatt
Date: 08:44:45 04/03/02
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On April 03, 2002 at 04:26:37, Tom Kerrigan wrote: >On April 02, 2002 at 23:41:05, Robert Hyatt wrote: > >>This depends on what is implemented. IE I suggested including a FPGA >>MakeMove() and UnmakeMove() function to take care of the hash updates. > >If you're talking about 64-bit hash keys, that would be a SHITLOAD of space on >an FPGA. It would take 3072 CLBs just to store an _int64[2][6][64], which puts >it clear out of the realm of any hobbyist FPGAs, and moreover, the busses around >the CLBs are designed such that it would take several cycles to read out any of >those _int64s, not that you would want to be adding them in parallel anyway... > >>does the search. That would result in minimal PCI traffic... and let the >>hardware run at full FPGA speed, which might be well beyond 30M nodes per >>second easily... > >I think the best clockspeed you could possibly hope for with chess logic is >~50MHz. Even the fully custom DB chips required several cycles per node, so 30M >NPS is completely out of the question. Again this depends on the FPGA you are looking at. DB processors ran at 20-24mhz, and searched at 2M-2.4M nodes per second each. Hsu later reported that at least a factor of 15 speed-up would be possible with newer fab processes. He predicted 36M for .18u as a first guess... > >>Deep Thought's evaluation was based directly on Belle's... Deep Thought >>was simply a "belle on a single chip" where belle was a huge batch of FPGA's > >I don't think FPGAs had been invented at the time. > >-Tom They've been around forever in various forms. Look up Ken's paper on Belle. Or his paper "An FPGA based move generator for the game of Chess" or any of several other publications including the second edition of "Chess skill in man and machine." Belle used them in 1980, for certain. I don't know how long they had been out by then...
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