Author: Robert Hyatt
Date: 12:54:54 04/03/02
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On April 03, 2002 at 13:58:32, Keith Evans wrote: >On April 02, 2002 at 23:41:05, Robert Hyatt wrote: >> >>This depends on what is implemented. IE I suggested including a FPGA >>MakeMove() and UnmakeMove() function to take care of the hash updates. > >I think that there's some fundamental confusion here. There are two things >that we're talking about. One is Slate's potential project and the >suggestions that you have made, and the other is what Marc Boule has >actually done. Slate was hoping that Boule's work would be sufficient, >and I was basically on your side arguing about the limitations of that >approach. And by the way Marc himself totally agrees with you. > >> >>But in the case of "chiptest" it implemented a full alpha/beta tree search, >>which means that if this became an FPGA process, you could give the FPGA a >>position to search and a depth, and sit and wait for milliseconds while it >>does the search. That would result in minimal PCI traffic... and let the >>hardware run at full FPGA speed, which might be well beyond 30M nodes per >>second easily... > >ChipTest the chip didn't implement alpha/beta search or evaluation. That was >done externally. If you reread what I wrote I am referring to the approach where >just the move generator is put on the PCI bus, and why you won't get much (if >any) acceleration by doing that. I understand the basic API for a Deep Blue >style chess chip and why PCI bandwidth would not be an issue for that. > >Regards, >Keith The final "chiptest" did do a search in hardware, according to the book I am looking at right now (Computers, chess and cognition). (page 56, middle of the page): "The second and more difficult task was to augment the hardware so that it could act as a simple searching engine..."
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