Author: Robert Hyatt
Date: 21:41:19 04/04/02
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On April 04, 2002 at 15:07:19, Keith Evans wrote: >On April 04, 2002 at 13:27:08, Robert Hyatt wrote: > >>On April 04, 2002 at 13:10:20, Keith Evans wrote: >> >>>On April 04, 2002 at 04:07:42, Tom Kerrigan wrote: >>> >>>>I know that simple, pipelined, carefully floorplanned, general-purpose CPU >>>>designs run at ~100MHz on modern FPGAs. From what I know of the >>>>Belle/Chiptest/DT/DB move generator, I'd expect its critical paths to be at >>>>least twice as long, and probably longer. So I'd put an optimistic upper bound >>>>of 50MHz on it. And that's just the move generator; I'd expect the eval logic to >>>>be slower. But if you take the optimistic 50MHz number and the very overly >>>>optimistic 2-cycle-per-node number, you get 25M NPS, not "30M NPS easily." >>>> >>> >>>Let's brainstorm a little here - is there any way that we can use N move >>>generators in parallel to increase the effective operating speed? What if one >>>generator were to generate moves for the top half of the board, and another were >>>to generate moves for the bottom half of the board? Any idea how much this >>>changed move ordering would affect the size of the search tree? >> >>This was the HiTech approach. 64 processors, one per square... Belle's >>find-victim/find-aggressor approach was cleaner and ultimately faster... >> > >Upon further reflection my idea seems dumb - doesn't make sense once you take >into search into account. So another question is - is there a known way to run >move generators/evaluators in parallel that is more efficient than what Hsu did? >Any other tweaks to increase performance beside reducing delay? Maybe hash >tables is it? > >Any simple way to estimate the performance increase of adding hash table support >to a chess chip? (Assuming a single ported hash table.) A chess chip searching N >[NPS] is equivalent to a chip searching N/M [NPS] with a S [entry] hash table? > >Regards, >Keith 1. I am sure there is room for more parallelism in various parts of the chip, but remember that Hsu was a very good designer and (for example) his evaluation _was_ highly parallel in its hardware implementation... 2. Hashing would certainly help, particularly in endgames... It isn't as big a thing as some might suspect however, because it isn't easy to do a "hash move" in the move ordering stuff since there is no move ordering in the hardware except for MVV/LVA and other simple tricks...
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