Author: Keith Evans
Date: 10:05:28 04/05/02
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On April 05, 2002 at 00:41:19, Robert Hyatt wrote: > >1. I am sure there is room for more parallelism in various parts of the >chip, but remember that Hsu was a very good designer and (for example) his >evaluation _was_ highly parallel in its hardware implementation... There are some big advantages that Hsu has... 1. He's a good designer willing to dedicate 10 years of his life to this project. 2. He was designing full custom chips - so he could really use circuit design techniques as opposed to logic design techniques 3. Access to GMs, Ken Thompson,... The result this is that his designs will be quite efficient. But my hope was that we could learn from his mistakes. So if there is any deficiency that you heard him complain about in his chips and can publicly discuss, then that might be very beneficial for future design efforts in this area. For instance in the next to last generation he surely complained about his lack of repetition detection publicly. >2. Hashing would certainly help, particularly in endgames... It isn't as >big a thing as some might suspect however, because it isn't easy to do a >"hash move" in the move ordering stuff since there is no move ordering in >the hardware except for MVV/LVA and other simple tricks... Here's where my ignorance may come shining through... In Marc Boule's move generator there is a way for software for force a particular move to be made - there is no reason why an on-chip state machine couldn't do the same. Couldn't you just force the move generator to make the hash move first? We could implement a hash move stack which would keep track of the hash move made (if any) so that during the remaining move generation we wouldn't make it again after returning to the node. And idea of the top of your head about what implementing hash moves versus just hash scores buys you? Or any recommendations for articles to read with a lot of benchmarking information? Regards, Keith
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