Author: Tom Kerrigan
Date: 21:53:39 04/05/02
Go up one level in this thread
On April 05, 2002 at 14:46:59, Robert Hyatt wrote: >Seems pretty obvious that "early deep blue hardware" meant something other >than "deep blue hardware"... Yeah, except you said "original," not "early." Do you consider Chiptest "original DB hardware"? Because I don't. >There _is_ no "precise number". There were three complete revisions of the >chess processor. I haven't seen anything that said all three had the same >number of cycles in each operation or that they didn't... So in other words, you don't know the numbers (because if you did, you would know whether or not they were the same). So your information-free replies continue to mistify me. >I think you pointed out the flaw yourself. 2000 instructions at 2ghz is not >_nearly_ enough to do a node. And a 12mhz FPGA is a very slow FPGA. 100mhz >is more like it for SOTA... I'll take on that 2ghz general-purpose CPU any >time you want... First, my own program would search more than 1M NPS on a 2GHz chip. Which means fewer than 2k cycles per node. Which means ~2k instructions per node, and possibly less. Which means that not only are 2k instructions "nearly" enough to do a node, they ARE enough to do a node. Second, what the hell are you talking about with regard to FPGA speeds? "A 12MHz FPGA is a very slow FPGA"? It's easy to come up with some logic that would run at less than 1MHz on the fastest FPGA ever. Your apparent notion that FPGA clock speed is somehow independent of the design that's loaded into the FPGA speaks volumes about your ignorance of what an FPGA actually is. -Tom
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