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Subject: Re: HW based Crafty (Boule's thesis)

Author: Tom Kerrigan

Date: 21:46:11 04/08/02

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On April 08, 2002 at 23:58:40, Keith Evans wrote:

>One nice thing about a bitboard accelerator is that it could probably be
>pipelined and clocked reasonably fast. One problem is that the placement of the
>RAMs is fixed - so routing delays may be large depending on how the tables are
>used.

How do you figure, about the pipelining?

I don't understand why "accelerating bitboards" is interesting. What bitboard
operation is expensive enough to warrant the 33MHz bottleneck? I can't think of
any.

Keith... I wonder how hard it would be to make an FPGA that's pin-compatible
with an Athlon or Pentium 4...? :)

-Tom



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