Author: Jeremiah Penery
Date: 08:11:01 05/13/02
Go up one level in this thread
On May 13, 2002 at 10:08:42, Vincent Diepeveen wrote: >On May 12, 2002 at 09:09:11, Jeremiah Penery wrote: > >>On May 12, 2002 at 07:18:07, Vincent Diepeveen wrote: >> >>>On May 11, 2002 at 13:14:02, Jeremiah Penery wrote: >>> >>>>On May 11, 2002 at 09:38:15, Vincent Diepeveen wrote: >>>> >>>>>For a 64 bits cpu to be interesting for chess they need to do something >>>>>no one ever has managed before. >>>> >>>>And that is...? The Alpha seems pretty nice, as well as POWER4, according to >>>>SPECInt numbers (for Crafty). Just because they aren't good for DIEP doesn't >>>>mean they can't be good for chess. You don't even use 64-bit variables in DIEP >>>>(right?), so why would you expect a 64-bit chip to be any faster for you? >>> >>>i'm using 'int' so if a compiler rewrites that to 64 bits, then it's >>>DIEP is a 64 bits program. >> >>No it's not. You're going to have half those bits filled with zeros, so it's >>irrelevant. > >No that's not irrelevant. If your 32 bits code must to to a special >slow 32 bits part of the cpu (like the IA64 has a few of those) then >that's going to slow down the program *a lot*. If it can >get compiled into 64 bits code then that's removing *that* disadvantage >at least of needing 32 bits execution units. Hammer doesn't have any of these problems. It runs old 32-bit code and new 64-bit code on the same execution units, in the same pipeline, using the same registers. >>>a 64 bits cpu is completely different from 32 bits. it's not an 'extension'. >>>Because 'extensions' are hell slower. >> >>x86-64 is pretty much an 'extension' of x86-32. > >No it's completely different logics. Would you call the switch from 16-bit 286 processor to 16-bit with 32-bit extensions 386 processor a 'completely different logics'? >it's not like rails of a train which you can simply widen a little (though >that's not that easy either at crossings). You need to design >completely new logics which is 64 bits. Obviously you have NOT read the documentation. >The additional problem you *directly* run into is that you can't >clock it as high as you can clock a K7 cpu. Also a 64 bits Hammer is going to be clocked higher than current Athlons. >cpu without plenty of registers is a major joke. If you can't >get 128+ registers, instead of the 44 or so the K7 has, then >such a 64 bits chip is not very serious for 64 bits applications! Sorry, Hammer doesn't have that many registers, because it's an EXTENSION of x86-32, which has even less registers. >>>The compiler is not such a trivial thing. If you get 256 registers >>>instead of EAX,EBX,EXC and another few others (with another 44 extra >>>registers to use for register renaming etc) then the importance of the >>>compiler is major. >>> >>>All the speedup has to come out of the compiler, *not* out of different >>>programmed software of course. >> >>The compiler is important, but it's not going to be a huge thing to make a >>compiler that emits decent x86-64 code, since it will be so close to existing >>x86-32 code. It's not like it has 256 new registers to deal with - there are >>only 8 more GP registers to deal with, and the fact that registers now hold 64 >>bits. > >The compiler is the main problem for a new 64 bits chip. The compiler is the main problem for IA-64, NOT for Hammer. >>>DIEP was very slow on the first alpha's, which is very irrelevant for >>>the blazing fast plans that are on the board for Hammer and McKinley. > >>Have you even read the documentations for IA-64? > >You realize that the IA-64 is produced by intel and NOT by AMD? You're the one who keeps trying to compare IA-64 to Hammer architecture, I'm just pointing out the differences, and noting that you obviously haven't read the documentation on either one. >>>On paper diep should be very fast on McKinley and Hammer. In reality however >>>both chips are not comparable. McKinley is 2 generations newer design >>>than Hammer is. > >>And the compiler for McKinley will be about 6 generations behind. :) > >There are 2 compilers for mckinley AFAIK. One produced by intel, >one produced by m$. So i'm not sure whether you find microsoft and >intel compiler running behind, may i ask you which outdated language >you write software in, microsoft basic date 1980? The compilers for IA-64 are like first generation compilers - it's a completely new architecture. Hammer uses x86, which has very mature compiler technology (7th generation or so). What does any of this have to do with the BASIC language? >>>Suppose all AMD does is extend their FPU/MMX thing with >>>some extra instructions. Then you have like 8 general MMX registers. >>> >>>That's not worth the effort of course. >>> >>>They need to make 128+ at least easily accessible 64 bits registers >>>at least to make the chip interesting. Then they STILL are a generation >>>behind on the McKinley. >> >>Do I need to keep asking if you've even read the documentation? x86-64 makes 16 >>64-bit general-purpose registers available. It also adds some MMX/SSE/SSE2 >>registers. > >Yeah the IA-64 documentation of microsoft for a hammer produced by AMD, >you're funny! What in the world are you talking about?? >>>With so many registers the importance of the compiler gets overwhelming. > >>>It's more than a factor 2 a good compiler on such a chip. >>> >>>There are more issues. How big is the size of this chip going to get? >> >>Hammer is supposed to be some 103mm^2. McKinley is 464mm^2. > >>>Now the most important question: how high can they clock such a chip? >>>The current plans on paper are simply not realistic. > >>Are you talking about Hammer here, or McKinley? > >Hammer, that the mckinley is fast and a real 64 bits cpu >we already know! I don't think we know how fast McKinley is, because there aren't any. Itanium certainly wasn't that fast. >Hammer at most is a big PR offensive promoting a 32 bits chip >being 64 bits, or a big failure as a native 64 bits chip. Hammer is not a completely native 64-bit chip, as I've been trying to tell you. It is a 32-bit chip with some ISA extensions to allow a 64-bit mode. That doesn't mean it's going to suck - it will still be better than the current Athlon chips. The biggest win for Hammer is that the memory controller is on-die. Memory latency is going to be dramatically reduced.
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