Author: Robert Henry Durrett
Date: 16:48:02 06/24/02
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On June 24, 2002 at 13:07:11, Gian-Carlo Pascutto wrote: >On June 24, 2002 at 10:27:05, Robert Henry Durrett wrote: > >>This "latency issue" is interesting. Could you please elaborate? How do the >>caches help? > >Bandwidth = amount of data that can be transferred per second >Latency = amount of time it takes to find something in the memory > >Generally, a chessprogram will need to access small amounts of >data that are scattered randomly throughout the memory of the >machine. Because of this, bandwidth isn't so important, because >there is only a small amount of data, but the latency is. > >-- >GCP Thanks. That does clear up a lot for me. I had suspected that the word "bandwidth" was used in a way unfamiliar to me. It sounds like the "information bandwidth" we used in information theory for communication systems. Still unclear about latency, though. The confusion is because I imagine that the process of retrieving from memory [or putting something into memory] actually involves more than one physical [or logical] process, one of which is "finding." This means, to me, that the latency spec would not necessarily tell the whole story on reading from [or writing to] memory. There must be more to this story which you have not said here yet. Presumably there would be similar concepts for caches. But it is not clear to me that the "bandwidth" concept is very useful for caches. Simply specifying the number of clock cycles required seems better. As for latency: High-speed caches will, presumably, have a different technology from RAM so the individual physical [and logical] processes involved would, it would seem, be different too. Not sure the "latency" concept is useful for caches either. There may be a more direct way to specify the time required for reading and writing. Maybe there's zero latency in caches since all gets done before the next clock cycle comes along? Summary: If the cache is extremely large, we are talking about using the cache in the place of the RAM of a normal PC. This is the scenario [& computer architecture] I would like to address. Not clear yet as to how "bandwidth" and "latency" would fit into this context. Bob D.
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