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Subject: Re: Huge Caches Mean Faster Chess Engines?

Author: Robert Hyatt

Date: 19:30:42 06/24/02

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On June 24, 2002 at 13:05:09, Gian-Carlo Pascutto wrote:

>On June 24, 2002 at 10:30:26, Robert Henry Durrett wrote:
>
>>This addresses half the problem.  What if the microprocessor wishes to WRITE
>>something.  Why not write it directly to a huge cache and bypass RAM entirely?
>>If you had extremely large caches, couldn't RAM be dispensed with entirely?
>
>Writing to a cache is somewhat different. I believe most caches
>work by writing both to the cache and to the RAM. Remember that when
>writing, you don't actually need to wait until the data is written
>out before you can do anything else, so there is no 'delay' in
>writing to the actual RAM.

That is "write through".  It isn't used much today.  Most caches use
"copy back" where a line is not written back to memory until it needs to
be replaced in cache and has been modified.



>
>However it's usually good to assume that something that was just
>written may be read in again soon, so it makes sense to already
>have a copy in the cache handy.
>
>--
>GCP



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