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Subject: Re: most people really don't understand this stuff . . . .

Author: Vincent Diepeveen

Date: 10:25:36 10/25/02

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On October 24, 2002 at 14:01:52, Anthony Cozzie wrote:

>On October 24, 2002 at 05:11:19, Jorge Pichard wrote:
>
>>If you compare the architecture advantages of a Dual AMD MP such as: The
>>operation per clock cycle, the floating point pipelines and the L1 Cache size
>>you can immediately see why AMD is the King.
>>
>>http://www.amd.com/gb-uk/Processors/TechnicalResources/0,,30_182_865_4362,00.html
>
>1. Intel's x87 FPU is (shudder) stack based.  Go look at spec fp 2k scores and
>watch a 1GHZ sun blow away a 3GHz PIV.  Intel made a deliberate decision to
>optimize for multimedia (read: DSP) for the PIV; the PIV emphasizes SSE as a way
>around the asinine stack based floating point unit.

But a K7 or McKinley blows away that Sun.

>2. PIV has a LARGER L1 Icache than athlon.  What idiot tacked an 8K DIRECT
>MAPPED L1 Dcache on it I have no idea.

Also note it is 64 bits based that cache. So only 1024 words.

The reason is very obvious of course. With a bigger L1 dcache they would
not be able to clock the cpu to 3Ghz. Instead they would be still at
1.4Ghz or so if they increased it bigtime.

>3. Don't make decisions based on the number of functional units.  In reality,
>those are never full - they are limited by various dependencies in the code.
>*ALPHA 21264* with a real ISA and a very aggressive ISA doesn't even hit 2 IPC
>when run on Spec Int 2k.  Hammer has the same number of FUs as the Athlon.
>Increasing the number of FUs does not give you infinite performance increases.

You just mention a few processors (alpha 21264) which have huge penalties
for branch mispredictions.

A processor that can't do on paper already more than 2 instructions a clock,
of course will never be able to do more than 2. So you definitely need
a shitload of instructions a clock, in order to be *enabled* to do
that many a clock. Only then we can look further to the cpu's weakest
spot.

1 decoder at the P4 is really pathetic. I am no big hardware expert, so
i don't know why they did this. Perhaps to get the chip cheaper and
clocked higher?

>anthony



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