Author: Kurt Utzinger
Date: 06:56:02 10/29/02
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On October 29, 2002 at 09:18:10, James T. Walker wrote: >It's supposed to mean "double data rate" since the data is supposed to be >transferred on both the leading and trailing edges of the clock cycle. However >it seems to have a negligible effect on chess program performance. Can someone >explain what the problem is and why the hype in the first place? (It's >expensive) >Jim Markus Pillen at CSS-Forum has testet SDRAM/DDRAM und several conditions and you can see the comparison at http://f23.parsimony.net/forum50826/messages/52531.htm Regards Kurt
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