Author: Matt Taylor
Date: 03:41:28 12/03/02
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<snip> >It is also noteworthy that the timings on AthlonXP are much tighter than on P4. >I have a benchmark that demonstrates not only the enormously deep P4 pipeline >but also that in individual instructions, including the SSE instructions that >Intel crafted, the AthlonXP executes a higher overall ipc. Source is available >for the benchmark, though it is Windows code. I'm going to have to retract that bit about faster ipc until I can test again. It seems that an error had crept into the results -- now rectified. It formerly showed AthlonXP stomping the P4 in FPU/SSE because the test was not being run enough times to compensate for minor errors intrinsic in the measurement. Since AthlonXP has a much smaller pipeline, it really was faster, but that takes into account latency, and the test is supposed to test throughput. (Consider -- total execution time on P4 Northwood is about 600 clocks. On my AthlonMP 1600 chips, it's about 100-120 clocks.)
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