Computer Chess Club Archives


Search

Terms

Messages

Subject: Re: Fast 3DNow! BitScan, one more faster

Author: Gerd Isenberg

Date: 05:39:09 12/03/02

Go up one level in this thread


On December 03, 2002 at 08:15:15, Matt Taylor wrote:

><snip>
>>With mmx there is some trouble with the 64-bit twos-complement, because there is
>>no paddq:
><snip>
>
>There is a paddq, just not in MMX. Intel's SSE 2 extensions support a paddq
>instruction that operates on the MMX registers -- unfortunately only available
>to Pentium 4 right now. (SSE 2 can be detected via bit 26 in CPU feature flags
>from edx register after cpuid vector 1.)
>
>-Matt

Hi Matt,

Yes, Hammer will have it too, paddq for MMX and XMM. As far as i know, Hammer
will have all (or most?) MMX, 3DNow!, MMX-and 3DNow Extensions, SSE and SSE2
instructions (with 16 XMM-registers).

It's a pity that Athlon has no 64-bit arithmetics with MMX-registers.

Gerd




This page took 0 seconds to execute

Last modified: Thu, 15 Apr 21 08:11:13 -0700

Current Computer Chess Club Forums at Talkchess. This site by Sean Mintz.