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Subject: Re: BitScan with reset - not so impressive with 3DNow!

Author: Matt Taylor

Date: 14:27:07 12/03/02

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On December 03, 2002 at 15:15:27, Russell Reagan wrote:

>On December 03, 2002 at 10:09:31, Gerd Isenberg wrote:
>
>>Let's see how fast Hammer's bsf reg64,reg64 will be.
>>If it sucks like Athlon, there are a lot of good alternatives.
>>I guess that with 64-bit arithmetic, to do a fast single bit isolation the trick
>>with 64int to 32bit float conversion is promising.
>
>I remember Eugene Nalimov giving a C routine for Crafty's FirstOne() that would
>run in ~12 cycles on the Itanium, after optimizations. bsf might not be needed
>at all.
>
>Which is faster on for finding the lsb of a 32-bit value on 32-bit hardware? bsf
>or a C-routine? If one is faster than the other on 32-bit hardware for 32-bit
>values, would the same be faster for a 64-bit value on 64-bit hardware?

Even between existing 32-bit hardware (e.g. Athlon, P3, P4) it varies widely.
The bsf instruction in particular takes variable time because it's really a CISC
instruction that codes for a slightly complex loop in microcode.

Another thing to remember is that, though Itanium may do it in 12 cycles,
Itanium's paradigm of computing is the VLIW idea of a heavily parrallel machine
executing larger numbers of instructions per clock. A single Itanium cycle does
much more work than a single cycle on your average P4 2 GHz or AthlonXP 2000
system, which is why Itanium can afford to lag behind 1 GHz without sacrificing
its performance crown. Existing IA-32 processors are very different, and
observations made about Itanium will not necessarily hold true for Athlon and
P4.

Elsewhere in this discussion I posted some timings recorded from my AthlonMP for
several bit-scan algorithms that had been mentioned, including the version using
the bsf instruction. The bsf instruction was faster in one case where it had the
advantage of an early-out algorithm.



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