Author: Vincent Diepeveen
Date: 15:19:43 12/04/02
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On December 04, 2002 at 17:40:13, Matt Taylor wrote: i hope you realize that good programmers/designers work months to get 1.3% speedup. Both chessprogrammers for their program and hardware designers for their chips. 13% is really a lot then if you understand that the speed of DIEP isn't depending only upon memory speed, but even more upon processor speed. So the actual speedup of DDR ram over SDRAM in latency is more like 100% faster, which is actually true. DDR ram needs 10T versus RDRAM 15T. That's already 50%. RDRAM initially was clocked 100Mhz and the DDR ram is clocked 133Mhz. Nowadays there is also RDRAM clocked to higher speeds than 100Mhz (quad pumped of course), but still it is of course 50% slower in timing than DDR ram. So where RDRAM might win it nowadays perhaps on bandwidth (tests which try to pump actual terabytes of data through the ram suggest that fastest DDR ram can pump through more than fastest RDRAM, despite theoretical specifications of the RDRAM versus theoretical specifications of DDR ram, but i don't want to get in the middle of a battle there which is getting fought out non-stop; and the truth is simply that you have to choose to believe either technical specifications or the actual tested speeds by experts so it is a forever 'yes' 'no' fight), there is not a single doubt on what is the better latency. DDR ram has over 50% faster latency than RDRAM. This is very clear. The bus of most of the tested old P4s was 100Mhz, versus K7 soon already 133Mhz. So also that speed difference we must take into account. If that total of 1.33 * 1.5 = 2.0 times faster latency is then giving a 13% speedup of DIEP, then that is quite a lot IMHO. >On December 04, 2002 at 13:32:01, Vincent Diepeveen wrote: > >>On December 04, 2002 at 11:42:17, Matt Taylor wrote: >> >>>On December 04, 2002 at 10:43:59, Vincent Diepeveen wrote: >>> >>>>On December 04, 2002 at 10:21:08, James T. Walker wrote: >>>> >>>>>On December 04, 2002 at 08:00:35, martin fierz wrote: >>>>> >>>>>>hi, >>>>>> >>>>>>i'm on the lookout for a new PC for endgame database computations. i'll probably >>>>>>be buying a lot of ram, 2-3GB. i see that there is a big price difference >>>>>>between DDRAM and SDRAM. IIRC the main difference is that you get a larger >>>>>>bandwidth, but about the same latency with DDR - so i suppose i'm better off >>>>>>buying SDRAM for my application. any opinions of the experts? >>>>>> >>>>>>thanks in advance >>>>>> martin >>>>> >>>>>For what it's worth: I purchased one stick (256M) of DDR ram to compare to my >>>>>cheap SDRAM. I found no noticable difference in chess performance (just price). >>>>> I did not do any extensive testing. I simply compared Fritz marks. I suspect >>>>>that in the future most motherboards will not accept the SDRAM. >>>>>Jim >>>> >>>>I see a big difference. 64 versus 32 bytes cache lines matters >>>>a lot for DIEP and all software that doesn't fit within L1 cache. >>>> >>>>Best regards, >>>>Vincent >>> >>>Cache line size is a part of the CPU, not the ram. There are a number of >>>transitional products, both P4 and Athlon, that accept both SDRAM and DDR SDRAM. >>>(However, I have never heard of anyone happy with these products.) >> >>the P4 ended up being a lot faster for DIEP when i tested a p4 with ddr ram >>isntead of RDRAM. >> >>P4 with ddr ram (northwood) is like 1.5 : 1 for a K7 >>used to be 1.7 : 1 to a k7 with rdram. >> >>So 1.7 Ghz P4 rdram == 1.0Ghz K7 for DIEP >> 2.4 Ghz P4 ddr == 1.6Ghz K7 for DIEP (both ddr). >> >>DDR is a big step forward!! >> >>i don't know where the processor gets 64 bytes instead of 32 bytes in >>the design. I just know it gets 64 bytes, versus SDRAM 32. >> >>Best regards, >>Vincent > >By your figures, DDR SDRAM speed compared to RDRAM speed on a P4 platform is >1.7/1.5 = 113%. I wouldn't call 13% a "big step forward." > >This also makes the assumption that both the 1 GHz K7 and 1.6 GHz K7 run equally >fast. The 1 GHz K7 is the Thunderbird chip. The 1.6 GHz K7 is the AthlonXP 1900. >Thunderbirds report that they are model 4, whereas AthlonXP 1900 may report >model 6 (palomino) or 8 (thoroughbred). Model 4 and Model 6 are not the same >thing, and they differ in MORE than just instructions. One change that I have >observed is that the model 6 L2 cache is slightly faster. Other timings have >probably changed, too. > >I will also mention that a 2.4 GHz P4 is the P4 Northwood. The 1.7 GHz P4 may be >a Northwood, but I suspect (based on the numbers) that it was probably the older >Williamette. The major difference is that the P4 Williamette had a smaller L2 >cache (256KB instead of 512KB). > >I will have to agree with Jeremiah, here. If DDR SDRAM is faster, DIEP is >latency-dependant. If RDRAM is faster, it would be bandwidth-dependant. I have >measured pc800 RDRAM bandwidth on one of my systems, and it exceeds theoretical >bandwidth on any standard part DDR SDRAM. (I am not completely sure, but I don't >think pc2700 is part of the JDEC specification.) > >I am not sure what you're saying about 64-bytes vs. 32-bytes, but I assure you >that SDRAM-based, DDR-based, and RDRAM-based P4s all have the cache line size. >The information is available from the cpuid instruction. The vector is >documented in both Intel and AMD literature, but off-hand I don't know which >vector it is. There are many utilities, especially for Windows, that will give >this information. I -believe- wcpuid is one such utility, but I usually end up >writing a program every time I get curious about cpuid information. > >If you would like, I will write such a program and post it. > >-Matt
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