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Subject: Re: Latency versus Information Bandwidth: Questions

Author: Robert Hyatt

Date: 20:14:42 12/05/02

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On December 05, 2002 at 20:04:57, Jeremiah Penery wrote:

>On December 05, 2002 at 19:56:19, Robert Hyatt wrote:
>
>>On December 05, 2002 at 18:22:09, Jeremiah Penery wrote:
>>
>>>On December 05, 2002 at 18:10:40, Robert Hyatt wrote:
>>>
>>>>That's fine, but that is not the same thing as saying "each processor has a
>>>>dedicated bus to its
>>>>own memory".
>>>
>>>Each processor DOES have a dedicated bus to its own memory.
>>
>>
>>One of the two statements can't be true.  A crossbar is _not_ a dedicated bus.
>>
>>So either it is a dedicated bus which means NUMA, or it is a crossbar which
>>means it is not a dedicated bus...
>
>Each processor has a dedicated bus to its local memory.  Other processors access
>that memory via the crossbar.


That is A NUMA approach.  "Non Uniform Memory Access/Arch".  One gets it
quickly, the other gets it less quickly.  Nothing wrong with that but there is a
big issue in distributing the data for efficiency..

The problem is that there is no easy way to have _two_ paths to a bank of
memory, except for making it dual-ported, and then there are bank conflicts.
I think this "solution" is going to be an interesting one to study when it
comes out, as there are some obvious difficulties to overcome.



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