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Subject: Re: Beating Bitscan to Death -- redux

Author: Matt Taylor

Date: 13:51:32 01/05/03

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On January 05, 2003 at 15:40:30, Walter Faxon wrote:

>Hi, Matt.
>
>For bitscan, here is one last try using the masking logic.  Note the
>(potential!) use of cmoves instead of setcc with shifts.
>
>I have a question:  You've written several times about advanced x86's "renaming"
>registers.  Does a compiler avoid register saves/restores by writing special
>instructions to do this, or does the processor somehow do it on the fly?  Or
>maybe I'm misunderstanding this entirely.
>
>-- Walter
>
>
>Code follows:
<snip>

Register renaming is done on the fly. The processor has some moderate number of
registers (I believe 40 is the count I have seen for Athlon) internally. When
the processor sees a register being used, it will remap it into one of the real
physical registers. I don't remember -why- they do this. I guess it wasn't that
important to me at the time I read about it...

I'm not sure if the new code you have will work any better than the original
code. The cmovcc instructions will only copy reg->reg or mem->reg. I can stash
the values you have there into memory, but that will introduce at least 2 cycles
memory access latency (assuming the values are in the cache, assuming I can
successfully overlap to avoid the latency, etc.)

I was chugging away on the older binary search routine yesterday. I've modified
it to use a 5th register. This allows me to stagger the accumulation and make
use of extra cycles that were burning waiting on instructions to retire. It is
amazingly efficient -- considering the maximum of 3 instructions/cycle, there
are only 7 slots wasted across the entire routine (38 instructions). This means
optimum execution time for this sequence is 13 cycles, and I'm doing it in 15.

I think with some simple changes I can further reduce the instruction count as
well as the execution time.

-Matt



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